Job information
1. Responsible for IP evaluation and integration;
2. Responsible for module design, design implementation, and simulation verification;
3. Responsible for chip architecture design and documentation;
4. Responsible for providing technical support for application design and testing.
5. Use mainstream EDA tools to implement digital module-related design from Netlist to GDS;
6, provide lib / lef and other related data to the upper layer design;
Complete layout and routing, CTS, static timing analysis, power calculation, IR drop analysis, crosstalk analysis, physical verification (DRC/LVS), etc.
job requirements:
1. Bachelor degree or above in related fields such as microelectronics, electronics, and communication;
2. Have a certain theoretical basis of CMOS integrated circuits and knowledge of digital chip development;
3. Familiar with the timing requirements of digital circuits, master a hardware description language (such as Verilog, etc.);
4. Understand the chip design process and the front-end simulation debugging tools;
5, have good communication skills and teamwork ability.
Contact information
Work address: Room 202, Block B, MCC, North Zhongtian, Maojiaqiao Road, Xidoumen Road